Senior Physical Design Engineer & Tech Lead (SoC/ASIC)
Job in
Sunnyvale, Santa Clara County, California, 94087, USA
Listed on 2026-08-10
Listing for:
Highbrow Technology Inc
Full Time
position Listed on 2026-08-10
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Hardware Engineer -
IT/Tech
Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
Highbrow Technology Inc. is seeking an experienced Physical Design Engineer / Technical Manager to drive RTL-to-GDSII implementation, timing closure, and PPA optimization for advanced ASIC/SoC designs.
The role covers floor planning, place-and-route, CTS, EM, sign-off, and automation scripting; candidates should have 12+ years of ASIC/SoC experience and hands-on flow with DC/Genus, Innovus/ICC2, Prime Time, Calibre, and related tools.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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