Senior Manager, SoC Design Verification and Methodology
Listed on 2026-08-26
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Engineering
Test Engineer
Senior Manager, SoC Design Verification and Methodology
Location:
Sunnyvale, CA, USA
Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.
In most instances, this position requires in-person interviews as part of the hiring process.
Minimum qualifications:- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 15 years of experience with SOC design verification, System Verilog, and UVM.
- 6 years of experience in people management, developing employees.
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in defining, developing, and deploying advanced verification methodologies across complex SOCs.
- Experience in low-power design verification.
- Knowledge of general-purpose operating systems such as Linux and Android, and familiarity with ARM Instruction Set Architecture.
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Senior Manager, System on a Chip (SoC) Design Verification and Methodology for Google's TPU designs, you will lead a team and own the functional verification for key components by guiding the development of advanced methodologies and infrastructure at the subchip, subsystem, and full-chip levels. This includes developing comprehensive test plans, standardizing verification flows, writing diagnostic codes, and building monitors and checkers to ensure quality assurance.
Additionally, you will partner closely with front-end design, architecture, and performance teams. By analyzing coverage across multiple dimensions, you will help ensure architectural compliance, verify functional correctness, and guide your team to meet key performance goals.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting‑edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world‑leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job‑related skills, experience, and relevant education or training.
US: $240000 - $333000 (USD) + 25% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities- Lead a team of individuals; set and communicate individual and team priorities that support organizational goals. Meet regularly with individuals to discuss performance and development, and provide feedback and coaching.
- Define and drive advanced verification methodologies and strategies, including the use of simulation for bug hunts, formal verification for corner‑case bugs, and emulation for system validation.
- Guide the functional verification team for portions of TPU designs, developing scalable functional verification infrastructure across subchip, subsystem, and full‑chip level environments.
- Partner with front‑end design, architecture, and…
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