Senior ASIC Design Verification Engineer, Cloud

Senior ASIC Design Verification Engineer

In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

You will use your design and verification expertise to verify complex digital designs. You will collaborate closely with design and verification engineers in active projects and perform exceptional verification. Using your UVM and System Verilog coding and problem solving skills, you will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs.

You will be responsible for the full life cycle of verification, from verification planning to test execution, to collecting and closing coverage.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits.