Senior ASIC Timing & Sign-off Engineer
Job in
Sunnyvale, Santa Clara County, California, 94087, USA
Listed on 2026-09-08
Listing for:
Google
Full Time
position Listed on 2026-09-08
Job specializations:
-
Engineering
Hardware Engineer, Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
Google is seeking a Static Timing Engineer to join the chip implementation team in Sunnyvale, CA. You will drive full-chip timing sign-off for high-performance ASICs, develop constraints, and automate STA flows using Tcl/Python/Bash, collaborating with architecture, logic design, and DFT teams to ensure robust timing and performance.
The role emphasizes building scalable timing methodologies, reviewing vendor/tool choices, and delivering reliable timing closures for industry-leading hardware
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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