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ASIC Engineer, Power

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Meta
Full Time position
Listed on 2026-09-09
Job specializations:
  • Engineering
    Electrical Engineering, Systems Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 146000 - 209000 USD Yearly USD 146000.00 209000.00 YEAR
Job Description & How to Apply Below

Summary:

Meta is building custom silicon to power the infrastructure that underlies its family of products and services. As an ASIC Engineer specializing in power on the EDA Infrastructure team, you will develop and maintain power analysis and optimization flows that enable silicon engineers across the organization to accurately model, estimate, and reduce power consumption in custom ASIC designs. In this role, you will work at the intersection of EDA tooling, physical design, and power methodology, helping to define the infrastructure that shapes how Meta's next-generation chips are designed and verified.

Required Skills:

ASIC Engineer, Power Responsibilities:

  • Develop and maintain power analysis flows including dynamic and static power estimation, vectorless analysis, and power intent verification using industry-standard EDA tools

  • Define and implement power methodology guidelines for RTL, synthesis, and physical design stages of the ASIC development flow

  • Collaborate with RTL design, physical design, and verification teams to identify and resolve power hotspots and inefficiencies across custom ASIC designs

  • Build and optimize EDA infrastructure scripts and automation frameworks to improve power signoff accuracy and turnaround time

  • Evaluate and integrate commercial and internally developed EDA tools into the power analysis flow, providing technical assessments and recommendations

  • Develop power intent specifications using UPF or CPF and ensure consistent application across design and implementation stages

  • Establish power budgets and track power metrics across design milestones, communicating results and risks to cross-functional stakeholders

  • Drive continuous improvement of power closure methodologies by analyzing results across multiple tape-outs and identifying systemic opportunities

  • Provide technical guidance to other engineers on power analysis best practices, flow usage, and debug techniques

  • Partner with EDA tool vendors to evaluate new capabilities and influence tool roadmaps to meet Meta silicon design requirements

  • Minimum Qualifications:

    Minimum Qualifications:

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

  • 6+ years of experience in ASIC design or physical design with a focus on power analysis, power optimization, or power signoff

  • Experience developing or maintaining EDA flows for power analysis using tools such as Synopsys Prime Power, Cadence Voltus, or equivalent

  • Experience with power intent specification languages such as UPF or CPF and their application across RTL-to-GDSII flows

  • Experience scripting in Python, Tcl, or shell to build and automate EDA infrastructure workflows

  • Experience collaborating across RTL design, physical design, and verification disciplines to drive power closure on complex ASIC designs

  • Preferred Qualifications:

    Preferred Qualifications:

  • Experience evaluating and qualifying new EDA tools or methodologies in a production silicon environment

  • Familiarity with custom or semi-custom design flows for high-performance computing or data center silicon

  • Experience with low-power design techniques including clock gating, power gating, multi-voltage domain design, and dynamic voltage and frequency scaling

  • Background in developing internal EDA infrastructure tooling or flow automation at scale across multiple concurrent design projects

  • Public Compensation:

    $146,000/year to $209,000/year + bonus + equity + benefits

    Industry:

    Internet

    Equal Opportunity:

    Meta is proud to be an Equal Employment Opportunity and Affiliation Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics.

    We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

    Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at

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