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ASIC Design Engineer II Speed Networking Chips

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Hewlett Packard Enterprise Company
Full Time position
Listed on 2026-09-09
Job specializations:
  • Engineering
    Hardware Engineer
Salary/Wage Range or Industry Benchmark: 106000 - 214000 USD Yearly USD 106000.00 214000.00 YEAR
Job Description & How to Apply Below
Position: ASIC Design Engineer II — High‑Speed Networking Chips

Hewlett Packard Enterprise seeks an ASIC Design Engineer 2 in California for an onsite role within the Juniper Silicon group. You will help design high-speed networking chips, from specifications to netlist, focusing on System Verilog RTL and timing closures with guidance from senior engineers.

Join a startup-like culture within a large company, with opportunities to grow your skills in a fast-paced, collaborative team and contribute to world-class silicon projects.

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