Silicon Validation​/Emulation Design Engineer

Silicon Validation/Emulation Design Engineer

As a Silicon Validation/Emulation Design Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well as multiple ARM-based sub-systems. You will be a key contributor in our pre-silicon hardware validation efforts using Cadence Palladium emulation platforms, enabling early system integration and hardware validation. You will work closely with SoC architects, RTL designers, and verification engineers to ensure our designs are thoroughly validated before tape-out.

You will help define the processes, methods, and tools for emulation environment development and debug of large complex SoCs. If you enjoy a fast-paced and ambitious environment, collaborating with people across different functional areas, and thriving during crisis times, we encourage you to apply and join us!

• Own and maintain Palladium emulation build flows for SoC and subsystem-level models.
• Drive debug and triage of emulation model issues, working with RTL designers and verification engineers.
• Support system-level hardware validation efforts and hardware integration.
• Develop reusable debug methodologies and collateral to accelerate issue resolution.
• Optimize emulation model performance through compile tuning, partitioning strategies, and platform configuration.
• Thoroughly document flows, debug procedures, and best practices.
• Collaborate with cross-functional teams to define emulation requirements and support prototype hardware validation.

• BS and a minimum of 10 years relevant industry experience

• Proven experience with Cadence Palladium (or equivalent emulation platforms such as Synopsys ZeBu), including build flows, compile optimization, and platform bring-up
• Strong debugging skills with experience in system-level and IP-level debug on emulation platforms
• Experience with emulation compile flows, including synthesis for emulation, memory compilation, clock modeling, and I/O abstraction
• Proficiency in debug tools and methodologies (waveform analysis, signal probing, assertion-based debug, transactors)
• Solid understanding of RTL design concepts, SoC architectures, ARM-based subsystems, and standard bus protocols (AXI, AHB, APB)
• Experience developing and maintaining automation scripts (Python, Tcl, Perl, Shell) to streamline emulation workflows
• Strong analytical and problem-solving skills with ability to debug complex system-level issues
• Experience with Wireless SoC applications (Wi-Fi, Bluetooth, cellular) - strongly preferred
• Excellent communication and collaboration skills to work effectively across functional teams
• Experience with version control systems (Git, Perforce) and CI/CD integration for emulation flows

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $184,700 and $324,800, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs.

Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including:
Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role…