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Systems Engineer Engineering Design & Technologists Hardware Engineer

Senior USB ASIC Design & RTL Lead

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Synopsys
Full Time position
Listed on 2026-06-19
Job specializations:
  • IT/Tech
    Systems Engineer, Engineering Design & Technologists, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 200000 USD Yearly USD 150000.00 200000.00 YEAR
Job Description & How to Apply Below
Synopsys is seeking an experienced ASIC Digital Design Manager in Sunnyvale, California. You will lead a team focused on USB digital design and architecture, overseeing RTL design execution and mentoring engineers. Ideal candidates have 12+ years of experience with strong ASIC design fundamentals and a proven track record. The role offers competitive compensation, including potential bonuses and comprehensive benefits, contributing to Synopsys' leadership in high-speed interface IP across key markets.
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Position Requirements
10+ Years work experience
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