ASIC Technology Librarian

Google, Sunnyvale, CA, USA

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience with managing vendor engagements and library delivery schedules in an ASIC design environment.

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience in Logic Equivalency Checking (LEC) (e.g., Formality or Conformal).
• Familiarity with practices for managing ASIC project library updates and releases.
• Proficiency in library validation tools (e.g., Solido Crosscheck) and understanding of foundation library PDKs from foundries (e.g., TSMC).
• Demonstrated ability to compile libraries and debug issues across design views (.lib, .db, .ndm, .lef, .gds).
• Skills with scripting languages such as Tcl or Python to automate workflows and experience creating technology library management and installation flows with integrated validation.

• Manage the handoff of library collateral (e.g., TSMC process design kits, Synopsys and other third‑party IPs) to projects, performing checks to ensure data integrity.
• Drive library validation across views (.lib, .db, .ndm, .lef, .gds) using tools such as Siemens Solido Crosscheck.
• Perform Logic Equivalency Checking (LEC) using tools such as Formality or Conformal.
• Oversee library updates in ASIC projects, applying methodical processes to detect and prevent errors during releases.
• Manage vendor engagements and library delivery schedules in an ASIC design environment.
• Verify and install vendor libraries for live ASIC projects, ensuring correctness and consistency across releases.
• Automate workflows using scripting languages such as Tcl or Python to manage technology library pipelines and integrated validation.

US: $138,000 - $198,000 (USD) + 15% bonus target + equity + benefits

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