Neuromorphic Front-End Lead

Responsibilities

• Engage with architects and AI researchers to identify hardware innovations and optimizations and translate them into implementable microarchitectures
• Lead design implementation and verification through post-silicon validation
• Partner with physical/custom design engineers and prototype blocks through place-and-route before hand-off
• Co-design critical custom circuits, such as memories, to achieve the best KPIs
• Evaluate, select, and integrate internal and external IP, including I/O interfaces
• Work with software and systems teams to enable development before tape-out and ensure smooth post-silicon bring-up
• Mentor engineers and strengthen design and verification practices as the program scales
• Turn emerging neuromorphic and AI accelerator concepts into robust, manufacturable silicon

• MS in Electrical/Computer Engineering, Computer Science, or a related field
• 10+ years of hands-on design experience in processors, accelerators, SoCs, or custom ASICs
• 5+ years of experience with RTL design (Verilog/System Verilog) and modern ASIC flows (synthesis, timing closure, CDC/RDC, formal, DFV)
• 3+ years leading silicon design and/or verification teams
• Extended Background Investigation, including extended education, SEC sanctions, and additional criminal and civil checks
• PhD with a research background in hardware acceleration, especially AI (preferred)
• Experience with advanced packaging and heterogeneous integration technologies, such as chiplets, UCIe, and 2.5D/3D (preferred)
• Experience with asynchronous design methods and custom memory/circuit co-design (preferred)
• Experience with pre-silicon enablement via emulation or FPGA prototyping (preferred)
• Experience with low-power (UPF) methods and security features such as Root of Trust and secure boot (preferred)
• History of technical ownership on multiple product tape-outs (preferred)

Demonstrates expertise in hardware design and verification, with a strong focus on processors, accelerators, and custom ASICs. Proven ability to lead teams in silicon design, mentor engineers, and integrate advanced technologies for optimal performance.

• RTL Design (Verilog/System Verilog)
• Silicon Design Leadership
• Custom ASIC Development
• Post-Silicon Validation
• Hardware Acceleration

• Processor Design
• Accelerator Design
• SoC Design
• Custom ASIC Design
• Synthesis
• Timing Closure
• CDC/RDC
• Formal Verification
• DFV
• Low-Power Design (UPF)

• Mentoring
• Collaboration
• Leadership

• MS in Electrical/Computer Engineering
• PhD in Hardware Acceleration (Preferred)

• Microarchitecture
• Custom Circuits
• I/O Interfaces
• Post-Silicon Bring-Up
• Root of Trust
• Secure Boot

• FPGA Prototyping
• Emulation
• Advanced Packaging
• Heterogeneous Integration
• Chiplets
• UCIe
• 2.5D/3D Integration