Senior Hardware Design Engineer at Raytheon Tewksbury, MA

Senior Hardware Design Engineer – Raytheon, Tewksbury, MA

Date Posted:

Country:
United States of America

Location:

MA131:
Tewksbury, MA Bldg 1 Assabet 50 Apple Hill Drive Assabet
- Building 1, Tewksbury, MA, 01876 USA

Position Role Type:
Onsite

U.S. Citizenship:
Required to obtain and maintain a U.S. government‑issued secret security clearance.

Security Clearance:
DoD Clearance
- Secret

We are looking for a Senior Hardware Design Engineer to contribute to the Receiver, Exciter, and Back End Processing (REBEP) Department, responsible for design, development, integration, and lifecycle support of radar receiver, exciter, and transmitter subsystems.

• Circuit and sub-system architecture, design, modeling, simulation, and verification.
• Integration and test at component, CCA, and subsystem levels.
• Transition to production and technical support to manufacturing and test engineers.
• Occasional travel to supplier, integration, and customer sites may be required.
• Opportunities to manage small projects or processes within area of responsibility.
• This 1st shift role will be 100% on-site with an opportunity to be based in either Tewksbury, MA or Marlborough, MA.

• Typically requires a STEM degree and a minimum of 5 years of prior work experience, or an advanced degree in a related field and a minimum of 3 years of prior work experience.
• Combined experience in two or more of the following areas:
  • Digital Design (Requirements development through Build and Test)
  • Production Testing
  • Experience with design simulation tools (e.g., Hyper Lynx, LTSpice) and analytical tools (e.g., Matlab).
  • Experience with design development tools (e.g., Mentor Graphics' Xpedition schematic capture and layout).
• U.S. citizenship required; ability to obtain and maintain a Secret security clearance.

• Experience interfacing and testing with Digital to Analog (D/A) and Analog to Digital (A/D) converters.
• Experience with high‑speed interfaces such as JESD
  204B, DDR3/DDR4, SERDES, 10G+ Ethernet, Fiber Channel.
• Background in FPGA hardware inference designs including SERDES, LVDS chip‑to‑chip and board‑to‑board.
• Understanding of allocating and flowing down requirements from system to component level.
• Knowledge of cost estimating, budget and schedule management.
• Experience working in a laboratory environment using logic analyzers, oscilloscopes, phase noise analyzer, and spectrum analyzer.
• Experience in a production environment.
• Experience in technical writing, proposal writing, and oral presentations.
• Active Existing Secret U.S. Security Clearance.

• Values:
  Safety, Trust, Respect, Accountability, Collaboration, and Innovation.
• Relocation based on candidate eligibility.

Please consider the following role type definition as you apply for this role. Onsite:
Employees who are working in Onsite roles will work primarily onsite.

Role type:
Onsite, 1st shift, full-time, 100% onsite.

Salary Range: 82,000 USD – 164,000 USD. Benefits may include medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, employee scholar program, parental leave, paid time off, holidays.

This is a US‑based role. If the successful candidate resides in a US territory, the appropriate pay structure and benefits apply. The application window closes approximately 40 days from the posting date. The window may be shortened or extended at RTX's discretion.

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, or veteran status. RTX provides affirmative action for qualified individuals with a disability and protected veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans' Readjustment Assistance Act.