Sr. Hardware Engineer Oregon
Listed on 2026-06-02
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Engineering
Electrical Engineering, Systems Engineer
Sr. Hardware Engineer (Teradyne, Oregon)
Date: May 29, 2026
Location: Tualatin, OR, US
We are the global test and automation specialists, powering next‑generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost‑effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!
We attract, develop, and retain a high‑performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.
Our PurposeTERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought in our workforce. Our employees are supported to innovate and learn something new every day.
We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drives innovation and delivers better business results.
Opportunity OverviewThe Senior Hardware Engineer in the hardware group is responsible for designing, developing, and validating high‑current, high‑power sourcing and switching hardware used in semiconductor automated test equipment. This role focuses on power delivery architecture, fast transient response, load regulation, protection systems, thermal management, and system‑level integration to support advanced SoCs, FPGAs, high‑power devices, and complex test conditions. The engineer owns power‑delivery modules from concept through production release and collaborates across hardware, firmware, mechanical, and test engineering teams.
PowerDelivery Architecture & Design
- Architect and design high‑current power delivery modules (from mA to 100+
A) for ATE systems. - Develop fast‑response voltage/current sourcing circuits optimized for dynamic load conditions, droop control, and transient performance.
- Implement advanced power‑stage topologies (buck, multiphase, linear, hybrid) tailored for semiconductor test environments.
- Design for wide operating ranges, including high‑voltage rails, low‑voltage/high‑current rails, and dynamic voltage scaling.
- Model and mitigate droop, overshoot, ringing, and ground bounce under fast load steps.
- Perform simulation and analysis of loop stability, compensation networks, and transient response.
- Ensure compliance with DUT power‑up sequencing, ramp rates, and timing constraints.
- Design robust protection systems including OCP, OVP, OTP, short‑circuit protection, and fault‑isolation mechanisms.
- Implement fast fault‑response circuits to protect sensitive DUTs and ATE hardware.
- Conduct reliability analysis, derating studies, and thermal modeling for long‑term stability.
- Support HALT/HASS, stress testing, and failure‑mode investigations.
- Develop efficient high‑current solutions for routing power to multiple DUT pins or sites.
- Engineer low‑impedance, low‑loss paths for high‑current delivery with attention to thermal and mechanical constraints.
- Collaborate with mechanical teams on heat sinking, airflow, and thermal interface design.
- Lead bring‑up of new power‑delivery modules, performing root‑cause analysis of analog, digital, and mixed‑signal issues.
- Execute characterization plans for load regulation, transient response, efficiency, thermal behavior, and fault handling.
- Use advanced lab equipment (power analyzers, high‑bandwidth scopes, current probes, electronic loads) to validate performance.
- Ensure power‑delivery modules meet ATE system‑level requirements for timing, triggering, synchronization, and software control.
- Collaborate with firmware teams on control loops, telemetry, calibration, and fault‑reporting algorithms.
- Create and use ATE test…
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