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Senior FPGA Architect Memory Test Systems
Job in
Tualatin, Washington County, Oregon, 97062, USA
Listed on 2026-07-16
Listing for:
Teradyne
Full Time
position Listed on 2026-07-16
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Teradyne’s Memory Test Division (MTD) seeks a motivated FPGA Engineer to architect FPGA solutions for Flash/DRAM test instrumentation. You will contribute to high-performance test systems, collaborating with a global team to deliver reliable products on tight schedules.
Ideal candidates have a strong RTL/Verilog background, FPGA tool-flow experience, and familiarity with C/C++. You’ll guide juniors, maintain designs, and may travel to customer sites as needed.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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