FPGA Engineering Manager - Lead Memory Test Solutions
Job in
Tualatin, Washington County, Oregon, 97062, USA
Listed on 2026-07-21
Listing for:
Teradyne
Full Time
position Listed on 2026-07-21
Job specializations:
-
Engineering
Job Description & How to Apply Below
Teradyne's Memory Test Division (MTD) in Tualatin, OR seeks a hands-on FPGA Engineering Manager to lead a small team delivering memory test solutions. The role combines technical oversight, project management, and direct engineering contributions to ensure high‑quality, reliable products.
You will plan projects, collaborate with hardware, software, and firmware teams, recruit and coach engineers, and contribute to FPGA architectures, RTL coding, timing, and lab validation.
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