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Semiconductor Design Engineer (Compute Test, Oregon

Job in Tualatin, Washington County, Oregon, 97062, USA
Listing for: Teradyne
Full Time position
Listed on 2026-08-22
Job specializations:
  • Engineering
    Test Engineer, Electronics Engineer, Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 154900 - 247800 USD Yearly USD 154900.00 247800.00 YEAR
Job Description & How to Apply Below
Position: Semiconductor Design Engineer (Compute Test, Oregon)

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Date: Aug 18, 2026

Location: Tualatin, OR, US

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together,Teradyne companies deliver manufacturing automation across industries and applications around the world!

We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.

Our Purpose

TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day.

We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drives innovation and delivers better business results.

Opportunity Overview

The Semiconductor Design Engineer will play a key role within Teradyne’s Compute Test Division Engineering team, focusing on the development of advanced test instrumentation. This role supports architecture, design, implementation, verification, and lab validation in a dynamic, multi-site engineering environment. The ideal candidate will bring strong digital logic design expertise, hands-on FPGA experience, and the ability to collaborate across hardware, software, systems, and verification teams.

  • Lead architecture, design, implementation, verification, and lab validation for test instruments and systems.
  • Develop scalable, high-performance, high-quality, extensible, and maintainable digital design solutions.
  • Collaborate with hardware, software, systems, and design verification teams to define requirements and achieve appropriate test coverage.
  • Build and execute product integration, verification testing, debug, prototyping, and characterization experiments.
  • Mentor junior engineers and provide technical leadership for FPGA project teams.
  • Support logic design process improvement initiatives and tool evaluations to sustain engineering excellence and product quality.
All About You

We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you’re ready to join us in this mission, take a closer look at the minimum criteria for the position.

  • BS in Electrical Engineering or a related field required; advanced degree preferred.
  • Minimum of 10 years of practical hardware development experience.
  • Primary experience in digital logic design and FPGA physical design, including floor-planning, place and route, and static timing analysis.
  • Expertise with Verilog and a scripting language such as Python, TCL, or PERL.
  • Experience with Xilinx and/or Intel FPGAs; standard cell ASIC design experience preferred.
  • Familiarity with System Verilog, UVM, VHDL, C, and C++ preferred.
  • Working knowledge of PCIe, AXI, DDRx, SERDES, USB, I2C, SPI, 10/100GE, PLL, HBM, DLL, ADC, DAC, MIPI, Display Port, and PRBS technologies.
  • Experience with Windows and Linux operating systems, as well as development tools including Cadence Xcelium, Synopsys Spy Glass CDC/LINT, Xilinx Vivado, Intel Quartus, Clear Case, Git, SVN, JIRA, and continuous integration methodologies.
  • Understanding of design for high-speed signal integrity.
  • Excellent troubleshooting, debugging, and problem-solving skills.
  • Strong verbal, written, and presentation skills.
  • Experience working in cross-functional teams designing complex systems.
  • Commitment to excellence, efficiency, mentorship, and product quality.
Compensation

The base salary range for this role is $154,900-$247,800. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

Incentive Plan

This job is eligible for discretionary bonus(es) based on financial performance.

Benefits

Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.

Job Segment

Testing, Design Engineer, Manufacturing Engineer, Test Engineer, Business Process, Technology, Engineering, Management

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