Senior FPGA Engineer; DOD cleared Security Clearance

Position: Senior FPGA Engineer (DOD cleared) with Security Clearance
All Qualified candidates will be responded to in 24 hours or less Interim Secret required prior to start

Employment type:

Full Time W-2 or Contract Rate: open to Negotiation Benefits: including Health, Dental Vision, PTO, Holidays, 401K,etc Senior FPGA Engineer

Location:

Tucson, AZ

Schedule:

On-Site Clearance:
Secret clearance or higher required prior to start Role Summary Seeking a senior-level FPGA Engineer to support the design, development, verification, and integration of production-quality FPGA solutions for advanced defense systems. This role covers the full FPGA lifecycle from requirements and architecture through VHDL coding, simulation, place-and-route, integration, debug, and production release support.

Key Responsibilities
* Develop and verify FPGA designs using VHDL.
* Support FPGA architectures for system-level applications.
* Translate system-level requirements into FPGA requirements.
* Perform simulation, synthesis, place-and-route, timing closure, integration, and debug.
* Work with circuit card designers and systems engineers to define interfaces and design requirements.
* Support FPGA designs involving RF/EO DSP, controls, data links, embedded processing, processor interfaces, and gigabit serial interfaces.
* Create technical documentation, including requirements, verification plans, and user guides.
* Support internal and external technical reviews as needed. Required Skills
* 8+ years of FPGA engineering experience.
* VHDL coding and digital design experience.
* Experience with Xilinx, Altera, or Microsemi FPGA devices and tool flows.
* Hands-on FPGA integration and debug experience.
* Experience delivering FPGA solutions into system-level applications.
* Ability to support FPGA work from requirements definition through integration and test.
* Secret clearance or higher required prior to start. Preferred Skills
* Radar or image processing experience.
* Embedded systems experience using ARM, Micro Blaze, or Nios processors.
* Experience with gigabit serial interfaces or multi-gigabit transceivers.
* System Verilog / UVM verification experience.
* Experience with emulation platforms such as Veloce.
* Strong technical documentation and review support experience. #cj