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FPGA Engineer - P2 - Cleared On-site

Job in Tucson, Pima County, Arizona, 85718, USA
Listing for: Blackstone Technology Group
Full Time position
Listed on 2026-07-16
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 120000 USD Yearly USD 90000.00 120000.00 YEAR
Job Description & How to Apply Below

Blackstone Talent Group, an award-winning technology consulting and talent agency, is seeking an FPGA Engineer - P2 - Cleared On-site to join our Client's team. The Effector Digital Products department is seeking an Electrical Engineer with FPGA development or verification experience.

Responsibilities
  • Design and deliver production quality FPGA releases from initial proof of concept up to production.
  • Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS).
  • Translate system level requirements into FPGA requirements.
  • Design and code in VHDL for reliability and maintainability.
  • Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage.
  • Help drive projects and execute to program schedules on time and budget.
  • Create complete documentation including requirements, verification plan, and user guides.
  • May support internal and external technical reviews.
Qualifications
  • Bachelor of Science in Computer Engineering or Electrical Engineering.
  • Minimum of 2 years of experience to include at least one of the following:
    Digital design and VHDL coding;
    Xilinx or Microsemi devices and flow tools;
    Delivering FPGA solutions to system-level applications;
    Hands‑on experience with integration and debug.
  • Ability to obtain and maintain a U.S. Security Clearance prior to the start date.
  • U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.
  • Ability to attain Special Program Access (SAP).
  • Security

    Clearance Required:

    Secret.
  • FPGA design experience in one or more of the following areas:
    Radar processing techniques;
    Image processing techniques for visual and infrared sensors;
    Embedded systems design using ARM, Microblaze, or Nios processors;
    Gigabit serial interfaces and multi-gigabit transceivers (MGTs);
    Constrained random verification in UVM using System Verilog;
    Verification utilizing emulation platforms such as Veloce.

EOE of Minorities/Females/Veterans/Disabilities

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