ASIC Tech Lead; Analog

The Opportunity

Lumai is redefining how the world computes. We are an ambitious, venture-backed UK startup pioneering a breakthrough AI accelerator for data centers which uses 3D optical compute. Our radical technology uses light to perform computation at orders of magnitude faster speeds and at far greater scales than ever before, all whilst consuming far less energy than traditional approaches.

Lumai is unlocking performance and efficiency gains that could transform the economics of AI and compute infrastructure and reshape how intelligence scales globally.

If you are passionate about bringing groundbreaking technology to market, and want to be part of a team pushing the boundaries of what is physically possible, Lumai is where you can make it happen.

Founded in 2022, Lumai is a University of Oxford spinout using optical processing to accelerate large language models (LLMs) and other transformer-based AI systems. The team combines expertise in optical computing, machine learning, and physics.

Lumai has already secured over $15 million in investment from leading deep-tech investors like Constructor Capital, IP Group, Photon Ventures and government grants, and is scaling rapidly to deploy the fastest optical compute currently available globally.

Lumai is developing a photonic AI compute chip that processes data using light rather than electrons — an architecture that demands world-class analog and mixed-signal design at its core. The photodetectors, transimpedance amplifiers, variable-gain amplifiers, high-speed ADCs, and analog control loops that sit at the interface between our photonic and digital domains are not commodity IP: they define the performance envelope of our entire platform.

As our ASIC Tech Lead (Analog), you will own the analog and mixed-signal subsystems end to end — from architecture and specification through schematic capture, layout review, simulation sign-off, silicon bring-up, and characterisation. You will set the technical direction for analog design at Lumai, define our circuit methodologies and design flows, and be the go-to authority on everything from low-noise front-ends to high-speed interfaces and precision bias generation.

This is a hands-on senior individual contributor role with strong technical leadership responsibility. You will mentor junior designers, collaborate closely with our photonics, digital ASIC, and firmware teams, and work directly with our foundry partners and EDA toolchain providers. You report to the Head of Engineering.

• Architect and own Lumai’s analog and mixed-signal subsystems, including TIA front-ends, VGAs, high-speed ADCs/DACs, PLLs, LDOs, bandgap references, and on-chip bias/calibration circuits
• Lead circuit design from concept through full custom schematic capture, pre- and post-layout simulation, and sign-off — taking personal ownership of critical blocks
• Define and enforce analog design methodologies, simulation corner strategies, and layout guidelines (matching, shielding, guard rings, substrate noise isolation) across the team
• Drive the analog/mixed-signal portions of tapeout: own the sign-off checklist, review LVS/DRC results, and coordinate with the digital and layout teams to meet tape-out milestones
• Lead silicon bring-up and characterisation of analog blocks — define bench test plans, debug first-silicon issues, and close the loop between measured silicon behaviour and simulation models
• Collaborate with the photonics team to define electrical interfaces to photonic devices (photodetectors, modulators) and co‑optimise for noise, bandwidth, and power
• Work with the digital ASIC and firmware teams to specify ADC/DAC interfaces, calibration sequences, and real‑time closed‑loop control requirements
• Evaluate and manage the EDA toolchain for analog design (Cadence Virtuoso, Spectre, Calibre, etc.) and maintain or extend the PDK/IP library
• Mentor and technically grow junior and mid-level analog designers; conduct design reviews and set the bar for simulation rigour and documentation quality
• Engage directly with Global Foundries (or other foundry partners) on PDK questions, process corners, and device modelling…