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ASIC Design Engineer Intern - Vision & NN Accelerators

Job in Washington, District of Columbia, 20022, USA
Listing for: Ambarella
Apprenticeship/Internship position
Listed on 2026-08-03
Job specializations:
  • Engineering
    Hardware Engineer, Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 150000 USD Yearly USD 120000.00 150000.00 YEAR
Job Description & How to Apply Below

Ambarella is seeking a skilled ASIC/RTL engineer to design video processing cores and neural network accelerators for edge devices. You will implement Verilog/System Verilog, synthesize RTL, and optimize timing, area and power.

You will develop test benches and verification plans using System Verilog, UVM, C++, and Perl, participate in chip bring-up, and collaborate on computer vision algorithms for autonomous vehicles and intelligent cameras.

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