Principal FPGA Networking Engineer

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Full Time Employee Full-Time US

15 days ago Requisition

Salary Range: $91,000.00 To $ Annually

Position Title:Principal FPGA Networking Engineer
Requisition :1874
Position Location:Remote
Position

Reports To:

Senior Manager, FPGA Engineering
Supervises Others:No

At Trident Systems Space Electronic Systems (SES) division, we believe in the power of using strong engineering principles to drive innovation and solve complex problems. We foster a culture of rigorous engineering and continuous improvement, leveraging the full knowledge of our organization through collaborative product development processes that include design and peer reviews. We combine our expertise in space electronics with right-sized development processes to create innovative, high-performance space-based electronic systems that meet our customers' evolving needs.

We are a mission partner supporting DoD, Intelligence Community, and Civil space customers. We develop complex, radiation-effects-mitigated designs that balance competing requirements in modern space programs, delivering cutting-edge solutions that enable our customers to achieve more in space.

Position Summary

The Principal FPGA Networking Engineer plays a critical role in the design and development of advanced FPGA-based networking solutions supporting space-based electronic systems. This position is responsible for architecting, implementing, and verifying complex, high-speed programmable logic designs for on-board networking, data transport, and packet processing functions using the latest AMD (Xilinx) technologies.

The ideal candidate brings deep expertise in RTL design, timing closure, simulation, and system integration, with a strong specialization in FPGA-based networking:
Ethernet (IEEE 802.3), high-speed serial interfaces, packet switching architectures, routers and switches, and hardware implementation of networking protocols (e.g., IP, TCP/UDP). They thrive in a collaborative, multi-disciplinary environment delivering mission-critical solutions to DoD, Intelligence Community, and Civil space customers.

Duties and Responsibilities

• Work within a multi-discipline team of engineers designing on-board networking, data transport, RF, processing, and data storage solutions for space applications utilizing AMD (Xilinx) technologies (e.g., Zynq Ultra Scale+ MPSoC, Zynq Ultra Scale+ RFSoC, Versal ACAP).
• Architect FPGA-based networking pipelines including Ethernet MAC/PHY integration, packet parsing/classification, switching/forwarding, buffering, and QoS mechanisms for high-reliability space systems.
• Design and implement packet switching fabrics, router/switch datapaths, control logic, and buffering/queuing schemes to support high-throughput, low-latency transport across multiple interfaces and protocols.
• Create and maintain complete FPGA designs using VHDL and Vivado IP Integrator with emphasis on efficient networking data-path architecture, deterministic latency, and reliable timing closure.
• Code, simulate, and verify RTL modules such as Ethernet MAC/PHY interfaces (IEEE 802.3), packet processing blocks, switching/routing/queuing logic, and control interfaces to peripherals and system controllers.
• Design and implement solutions that use embedded ARM processors, DDR4 memory, and high-speed serial interfaces (e.g., Aurora, PCIe, multi-rate Ethernet) to ensure robust data movement within and between FPGA-based subsystems.
• Implement and optimize hardware support for networking protocols and stacks (e.g., IP, TCP/UDP, VLAN, QoS), including offload engines and checksum/segmentation logic.
• Develop and maintain simulation test benches to ensure high code coverage and verify functional correctness, robustness, and performance of networking firmware modules.
• Define and maintain timing constraints and perform timing closure for multi-clock, multi-interface networking designs.
• Develop and maintain IP core-level and top-level design documentation, interface control documents, and performance characterization reports (e.g., throughput, latency, packet loss, resource utilization).
• Participate in code and design reviews, and contribute to FPGA design methodologies and best practices for high-performance networking and packet processing.
• Collaborate closely with hardware and software engineers to integrate FPGA networking designs with system…