Sr. Payload Systems Engineer; Secret Security

Vantor is forging the new frontier of spatial intelligence, helping decision makers and operators navigate what’s happening now and shape what’s coming next. Vantor is a place for problem solvers, changemakers, and go-getters—where people are working together to help our customers see the world differently, and in doing so, be seen differently. Come be part of a mission, not just a job, where you can:
Shape your own future, build the next big thing, and change the world.

Export Control/ITAR: Certain roles may be subject to U.S. export control laws, requiring U.S. person status as defined by 8 U.S.C. 1324b(a)(3).

Please review the job details below.

Vantor is hiring for a Systems / Electronics Engineer to join our Space Wrx team in Westminster, CO. This position offers in-office work days on Tuesday through Thursday and from home on Mondays and Fridays.

The team is responsible for end-to-end development of our next-generation satellite constellation, including defining the architecture and requirements for mission, vehicle, and payload elements; working with top-tier industry suppliers during manufacturing, integration, and test; and supporting launch and initial on-orbit operations. This is a broad Systems Engineering role with a special concentration on electronics. It offers direct exposure to complex, integrated systems including spacecraft platforms, optical payloads, laser communications, and advanced onboard processing.

It also necessarily links the capabilities provided by such technologies to Vantor’s imagery and software products to critical customer needs.

Vantor is known as the premiere provider of commercial imagery in the world. Our team is composed of multidisciplined engineers and leaders operating with a deliberate balance of lean execution and robust engineering, enabling us to move quickly while maintaining the rigor required for mission success. Just as important, we’ve built a culture of strong collaboration, shared ownership, and camaraderie—with a clear sense of purpose behind systems we deliver.

Responsibilities:

• Manage the technical interface between the imaging payload and spacecraft bus, ensuring compatibility and joint performance optimization across electrical,
mechanical, thermal, and data interfaces.

• Lead and participate in system-level trades to evaluate design alternatives, performance vs. cost/risk trade-offs, and technology insertion opportunities.

• Model and evaluate payload-level power, data, and timing interactions and contribute to electrical interface control documentation (ICDs).

• Participate in the evaluation of emerging technologies, COTS/FoS
(Commercial/Flyable off the Shelf) hardware, and new mission concepts with an eye toward system-level integration feasibility.

• Contribute to design reviews (SRR, PDR, CDR) and work across disciplines to ensure the payload systems meet performance, reliability, and environmental constraints.

• To the extent supported by previous experience in electrical engineering and electronics design (highly desirable), assess and troubleshoot emerging payload and bus designs down to the circuit level.

Minimum Qualifications:

• Must be a U.S. Citizen with an active secret Security Clearance or have the ability to
obtain secret clearance.

• Bachelor’s degree in Electrical Engineering, Aerospace Engineering, Physics, or a
related technical field.

• 3+ years of experience working with space-based optical remote sensing payloads
or similar hardware systems.

• Demonstrated experience with spacecraft-payload interface development, electrical interface analysis, and supporting cross-functional teams across the space segment.

• Experience with general software tools such as MATLAB and Python, and ability to learn and utilize new tools as dictated by evolving job demands.

• Understanding of requirements development documentation (e.g., specifications
and ICDs) and processes.

• Ability to interpret and analyze schematics, block diagrams, and PCB layouts, and perform system-level implications analysis from hardware-level…