Field-Programmable Gate Arrays Engineer
Job in
Westminster, Adams County, Colorado, 80031, USA
Listed on 2026-08-22
Listing for:
The Judge Group
Full Time
position Listed on 2026-08-22
Job specializations:
-
Engineering
Hardware Engineer, Embedded Software Engineer, Electronics Engineer, Test Engineer
Job Description & How to Apply Below
- Design, implement, and verify FPGA logic (RTL) for EOIR and other payloads on AMD Versal adaptive SoC and comparable architectures.
- Develop embedded firmware across the payload stack — Versal processing system, supporting microcontrollers, boot and configuration, and device drivers.
- Design and bring up detector-readout and sensor interfaces (focal-plane arrays / ROICs), including timing, control, and calibration paths.
- Implement high-speed data interfaces and onboard signal- and image-processing chains (Ser Des, Camera Link/CoaXPress/MIPI, Space Wire/Space Fibre; framing, corrections, compression).
- Lead board bring-up and hardware/firmware integration, debugging at the boundary between hardware and firmware.
- Integrate third-party and vendor IP cores, and coordinate with external developers and vendors to keep payload deliveries on schedule.
- Maintain traceability from FPGA and firmware designs to top-level system requirements, and ensure designs meet applicable safety and performance standards.
- Own verification: test benches, simulation, timing closure, and hardware-in-the-loop validation.
- Contribute to payload architecture, interface definition, and processor/component selection trades.
- BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field, plus [5]+ years developing FPGA logic and firmware for payloads, instruments, or other high-reliability embedded systems.
- Strong RTL design in VHDL or Verilog, with real verification experience and timing closure on AMD/Xilinx tool chains (Vivado/Vitis) and a simulation tool such as Model Sim/Questa Sim.
- Embedded firmware in C/C++ on SoC and microcontroller targets, bare-metal and/or RTOS.
- Direct experience with AMD Versal or Zynq / Zynq Ultra Scale+-class adaptive SoCs, or a clear path from comparable SoC experience.
- Experience with sensor/detector interfacing and high-speed data interfaces, and with on-FPGA DSP or image-processing chains.
- Hardware and ARM-based SoC bring-up and lab debug: oscilloscope, logic analyzer, protocol analyzers, and schematic reading.
- Must be able to obtain and hold a U.S. security clearance.
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