Senior Product Engineer - Speed Interface

Senior Product Development Engineer

High‑speed interface (HSI) development at Analog Devices requires ownership of interface bring‑up, validation, and product readiness across complex mixed‑signal ICs. The role leads qualification and characterization work for high‑speed interfaces such as Ser Des, JESD, high‑speed clocking and digital links, partnering closely with design, test, and applications teams to ensure robust performance from first silicon through release. The position also guides junior engineers and improves lab/automation methods to increase validation throughput and quality.

• Interface development & validation:
  High‑speed interface bring‑up, compliance validation, margin testing, and debug across boards and lab setups.
• Qualification leadership:
  Qualification planning and execution for interface‑related requirements across multiple product lines, including definition of test conditions and pass/fail criteria.
• Characterization & release readiness:
  Interface characterization across PVT and configuration space; correlation of bench data to simulation/model expectations; definition of operating limits and recommended settings.
• Debug & root‑cause isolation:
  Signal integrity and protocol‑level debug (eye diagrams, jitter, BER, equalization behavior, lane mapping, link training) with clear closure plans.
• Production/test correlation:
  Correlation between bench characterization and ATE results; support for test content, limits, guard‑bands, and yield robustness for interface metrics.
• Automation & process improvement:
  Validation framework development (Python/MATLAB/instrument control), data reduction, and repeatable measurement “recipes” that simplify complexity and improve throughput.
• Technical leadership:
  Technical guidance and mentoring for junior engineers, including review of debug approaches, test plans, and characterization results.
• Cross‑functional collaboration:
  Clear communication of interface risks, status, and recommendations to design, test, and program stakeholders.

• High‑speed interface validation:
  Deep hands‑on experience validating high‑speed digital links (e.g., Ser Des, JESD, related PHY concepts) from bring‑up through release.
• Signal integrity & measurements:
  Strong fundamentals and lab skill with eye diagrams, jitter sources, BER testing, equalization behavior, and high‑speed probing/fixtures.
• Lab automation & data analysis:
  Proven ability to build repeatable validation flows and analyze large datasets (Python preferred; MATLAB acceptable).
• Mixed‑signal product development:
  Experience supporting mixed‑signal IC evaluation/characterization and translating lab data into product guidance and limits.
• Qualification testing:
  Leadership in developing and implementing qualification/characterization programs tied to interface requirements.
• Production optimization:
  Ability to improve validation throughput and reliability via tooling, documentation, and process simplification.
• Cross‑functional execution:
  Track record of coordinating across design/test/apps to drive issues to closure and hit milestones.

• Master’s degree in Electrical Engineering or related field preferred.
• 5+ years of relevant experience in high‑speed interface validation, mixed‑signal product development, or related roles.
• Demonstrated technical leadership abilities.
• Experience with FPGA‑based validation platforms and/or embedded software/firmware workflows.
• Strong cross‑functional collaboration skills.

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