Staff Engineer, Design Verification Engineering
Listed on 2026-07-14
-
Engineering
Test Engineer
Job Title
Staff Engineer, Design Verification Engineering
LocationWilmington, Massachusetts
SalaryUSD $171,787 - $209,715 per year
Job TypeFull Time, 1st Shift/Days
Company OverviewAnalog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. It specializes in analog, digital, AI, and software technologies across sectors such as automation, robotics, mobility, healthcare, energy, and data centers. With revenue of more than $11 billion in FY25, ADI drives innovation worldwide.
Responsibilities- Develop and execute UVM-based verification environments for block‑level and full‑chip ASIC/SOC designs.
- Create and implement verification plans and strategies, including constrained‑random and directed test cases.
- Write and analyze functional coverage, assertions, and metrics to ensure thorough verification and track progress.
- Integrate and verify third‑party and custom IPs/VIPs within subsystem‑level UVM environments.
- Collaborate with design and cross‑functional teams to review test plans, resolve issues, and ensure coverage closure.
- Support post‑silicon verification activities with evaluation and applications engineering teams.
- Automate simulation data analysis and model validation using scripting languages and design automation tools.
- Offer partial telecommute benefit (2 days/week).
- Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, or a closely related field; alternatively, Bachelor’s degree with six years of experience in design verification.
- Four years of professional experience as a Design Verification Engineer or related role performing IC design or validation.
- Demonstrated expertise in metric‑driven verification throughout the design/verification lifecycle.
- Proficiency in System Verilog and UVM, including testbench and test case development.
- Experience using UVM agents and integrating third‑party or custom VIPs to develop stimulus sequences and functional checkers.
- Strong debugging skills for simulations and waveform analysis.
- Ability to translate design verification requirements into robust DV environments and analyze coverage to drive convergence.
- Actual wage varies based on location, experience, education, training, external market data, internal pay equity, and other factors.
- Discretionary performance‐based bonus.
- Medical, vision, and dental coverage; 401(k); paid vacation, holidays, sick time; plus other benefits.
Analog Devices may need to obtain export licensing approval from the U.S. Department of Commerce or State for positions requiring access to technical data, except for U.S. Citizens, U.S. Permanent Residents, and protected individuals. Analog Devices is an equal‑opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, political affiliation, or any other legally protected group.
EEO is the law:
Notice of Applicant Rights Under the Law.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).