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Mid-Level FPGA DSP Engineer – SDR & Space RF

Job in Woodbridge Township, Middlesex County, New Jersey, 07095, USA
Listing for: SWISSto12
Full Time position
Listed on 2026-07-14
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 110000 - 170000 USD Yearly USD 110000.00 170000.00 YEAR
Job Description & How to Apply Below

SWISSto
12 in United States (New York/New Jersey area) seeks a mid-level FPGA Engineer with DSP and communications focus to develop real-time signal processing pipelines on FPGA/SoC platforms for SDR and next-gen wireless systems, including 5G NTN.

The ideal candidate has 5–7 years in FPGA/ASIC design, strong DSP knowledge, and hands-on RTL experience with Xilinx/Intel tool chains, MATLAB/Python, and high-speed interfaces. Join a fast-growing aerospace innovator delivering cutting-edge RF products.

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