FPGA Engineer

Annual Salary: $120,000 - $170,000 per annum

Need to be a US Citizen

A Global leading company located in Arizona (USA) specializing in the industries of Satellite and Space are now hiring a brand-new FPGA Engineer to join the organization needing to have experience in the entire design flow for complex FPGAs
. The role would be ideal and well suited for an Experienced and Senior FPGA Engineer
.

The annual salary on offer for the successful FPGA Engineer is $120,000 - $170,000 per annum. The FPGA Engineer will need to be a USA Citizen
.

The FPGA Engineer will join a thriving engineering department that consists of the Platforms and FPGA SoC Group
. The FPGA Engineer will lead the design, development, and debugging of complex FPGA SoC systems for satellite communication systems, building on advanced IP integration, high-performance RTL development, and user-space driver/firmware creation.

• Bachelor’s degree in Electrical Engineering, Computer Science or Equivalent
• 5+ years of industry experience
• Digital design with FPGA/ASIC SoC design experience
• Strong FPGA Implementation with Altera Quartus, Xilinx Vivado
• Familiarity with FPGA simulation tools - Model Sim, Questa Sim
• Experience designing/debugging SoC systems with AMBA-compliant AXI and APB interfaces
• Experience designing fmax-optimized, high-throughput, pipelined AXI-Stream IP
• Capable of creating RTL simulations to identify and resolve most issues before hardware tests
• Knowledgeable in Static Timing Analysis (STA) and Synopsis Design Constraints (SDC)
• Experience implementing at least one Gigabit Transceiver Protocol - PCI Express, Interlaken, USB Super Speed, 1000
  
  BASE-X/SGMII, 10
  
  GBASE-R, 40
  
  GBASE-4, 100
  
  GBASE-R4
• Experience implementing Network Protocols, such as - L1: IEEE 802.3, Cisco, Q/SFP+ MSA standards for Ethernet (1G to 100G), L2/L3: IPv4, IPv6, ARP, ICMP, IGMP, UDP, TCP
• L4: VITA 49.2, IEEE-ISTO 4900 Digital IF Interoperability Standard (DIFI) and/or eCPRi, (Highly Desired)
• Experience of Embedded C, C++, Microcontrollers, GIT version control
• Working knowledge of Embedded Linux:
  Kernel / Yocto / U-Boot / Device Tree
• Knowledge & experience with schematic capture and PCB design and debug
• Technical expertise in FPGA development across the full lifecycle from RTL design, verification, synthesis, timing analysis, and bring up/validation
• Industry experience – Satellite, Space, Wireless technologies

• 3 week’s vacation
• 1-week personal time
• 1-week sick leave
• 10 holidays for a T4 Staff Engineer
• Medical, dental, and vision insurance plans
• And more