Field-Programmable Gate Arrays Engineer

Skills: RTL Design (VHDL/Verilog), Low-Latency Networking, C/C++, Hardware/Software Co-Design, Linux

Location: Chicago

The ideal candidate comes from a top-tier tech or trading environment—someone who has built ultra-low-latency systems from first principles and understands the fine line between hardware performance and software efficiency. They have a deep appreciation for high-speed networking, FPGA acceleration, and deterministic system design, operating close to the physical limits of hardware.

Join a core engineering group as a Lead FPGA Engineer, designing and optimising the ultra-low-latency hardware platform that powers cutting-edge electronic trading. You’ll own the full FPGA development lifecycle — from architecture and RTL design through verification, testing, and deployment in live trading environments. This is a hands‑on, high‑impact role where your work directly drives trading performance and competitive edge.

• Architect and implement next-generation FPGA solutions to accelerate trading, networking, and market data processing.
• Optimise system pipelines for sub‑microsecond latency and determinism.
• Collaborate with software and infrastructure teams to streamline hardware/software integration.
• Develop, simulate, and validate FPGA designs (VHDL/Verilog/System Verilog) targeting high-performance, low-latency environments.
• Engineer ultra-efficient PCIe, Ethernet, and DMA pipelines for real-time data flow.
• Automate build and deployment pipelines for FPGA design (Jenkins, Git Lab CI, custom tool chains).
• Profile and tune system-level performance across firmware, driver, and operating system layers.
• Partner closely with researchers and trading teams to translate strategy needs into hardware capabilities.
• Drive innovation in FPGA tooling, time synchronization, and deterministic networking architectures.

• Ultra-low-latency FPGA trading infrastructure competing at nanosecond scale.
• Hardware acceleration for market data, order handling, simulation, and signal processing.
• Co‑optimisation of firmware and Linux kernel to minimise end-to-end jitter.
• Continuous performance engineering and hardware experimentation for new trading strategies.

• Small, elite FPGA and hardware engineering team operating with high autonomy and ownership.
• Direct collaboration with quants, developers, and traders to deliver measurable edge.
• Culture built on technical mastery, precision engineering, and constant innovation.

Apply now for an informal, confidential discussion.