Hardware Design Engineer - ASIC

A quantitative technology firm is seeking a Hardware Design Engineer to help drive the development of custom silicon and digital hardware platforms that support highly demanding, performance-critical systems.

This opportunity is ideal for an engineer who enjoys working across the full hardware development process, from architecture and RTL implementation through verification, integration, and production release. You'll partner closely with engineers, researchers, and other technical stakeholders to build proprietary solutions where performance, reliability, and efficiency are paramount.

Rather than focusing on a narrow functional area, this position offers broad technical ownership and exposure to multiple aspects of digital hardware development.

• Design and implement RTL for custom hardware solutions using System Verilog.
• Collaborate on hardware architecture and feature development initiatives.
• Translate system requirements into scalable digital designs.
• Participate in design reviews and technical decision-making discussions.
• Support the deployment and ongoing evolution of advanced hardware platforms.

• Develop simulation environments and test strategies for RTL validation.
• Create automated testing infrastructure to improve design quality.
• Debug and resolve functional, timing, and integration challenges.
• Analyze hardware behavior and performance to ensure design objectives are achieved.
• Contribute to best practices surrounding verification and validation methodologies.

• Build tooling and automation that enhances engineering efficiency.
• Develop scripts to streamline design, testing, and deployment workflows.
• Identify opportunities to improve engineering processes and team productivity.

• Bachelor's degree or higher in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• Professional experience with RTL development and digital logic design.
• Strong proficiency with System Verilog.
• Solid understanding of digital systems, timing, and hardware architecture concepts.
• Experience developing verification plans and validation environments.
• Familiarity with clock domain crossings and multi-clock system design.
• Knowledge of Ethernet and networking fundamentals.
• Programming or scripting experience using C++, Python, Bash, or similar languages.
• Excellent troubleshooting and problem-solving abilities.
• Strong collaboration and communication skills.

• Experience working on ASIC development projects.
• FPGA design experience, particularly within ASIC-oriented workflows.
• Familiarity with high-speed communication and networking technologies.
• Knowledge of PMA and related physical interface technologies.
• Experience designing systems where latency and performance are key considerations.
• Exposure to electronic trading, financial infrastructure, or other real-time computing environments.
• Background building automated verification systems and testing frameworks.
• Advanced software development experience in C++.

• Demonstrates ownership from initial concept through final delivery.
• Combines strong technical fundamentals with practical execution.
• Effectively navigates challenges that span hardware, software, and systems engineering.
• Produces high-quality, maintainable designs with attention to detail.
• Works well within a collaborative engineering culture.
• Quickly adapts to new technologies, requirements, and problem spaces.
• Communicates technical concepts clearly across a broad range of stakeholders.