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Hardware Design Engineer; ASIC​/FPGA)

Job in Chicago, Cook County, Illinois, 60290, USA
Listing for: Selby Jennings
Full Time position
Listed on 2026-09-13
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer, Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 140000 USD Yearly USD 90000.00 140000.00 YEAR
Job Description & How to Apply Below
Position: Hardware Design Engineer (ASIC / FPGA)

Hardware Design Engineer (ASIC / FPGA / RTL)

Chicago, IL (Relocation Available)

We're hiring Hardware Design Engineers to help build the next generation of custom hardware powering one of the world's most performance-sensitive technology environments.

This team develops proprietary ASIC and FPGA-based systems that sit at the core of a highly optimized production platform where latency, throughput, reliability, and performance matter. Engineers are given significant ownership, work alongside elite hardware and software engineers, and contribute directly to technology that impacts real-world trading outcomes every day.

Unlike highly specialized hardware organizations, engineers here are exposed to the full design lifecycle and are encouraged to contribute across architecture, RTL development, verification, system integration, and tooling.

Hardware Design Engineer (ASIC / FPGA / RTL)

Chicago, IL (Relocation Available)

We're hiring Hardware Design Engineers to help build the next generation of custom hardware powering one of the world's most performance-sensitive technology environments.

This team develops proprietary ASIC and FPGA-based systems that sit at the core of a highly optimized production platform where latency, throughput, reliability, and performance matter. Engineers are given significant ownership, work alongside elite hardware and software engineers, and contribute directly to technology that impacts real-world trading outcomes every day.

Unlike highly specialized hardware organizations, engineers here are exposed to the full design lifecycle and are encouraged to contribute across architecture, RTL development, verification, system integration, and tooling.

Required Qualifications
  • Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline
  • 2+ years of full-time professional experience in ASIC, FPGA, RTL, digital design, or hardware engineering roles following completion of your degree
  • Strong RTL development experience using System Verilog or Verilog
  • Solid understanding of digital design fundamentals
  • Experience working with complex digital systems and multi-clock-domain environments
  • Understanding of clock-domain crossing concepts and timing fundamentals
  • Familiarity with Ethernet and networking fundamentals
  • Experience with Python, Bash, or similar scripting languages
  • Strong debugging, analytical, and problem-solving skills
  • Ability to work effectively in highly collaborative engineering environments
Preferred Qualifications
  • ASIC development experience
  • FPGA development experience
  • Experience with high-speed networking systems
  • Understanding of PMA, SERDES, or related technologies
  • Experience building verification frameworks and automation tools
  • C++ development experience
  • Experience working on low-latency or performance-sensitive systems
  • Background in custom hardware, networking, datacenter infrastructure, or distributed systems
Why Join
  • Build custom hardware that directly impacts production systems
  • Work alongside some of the strongest hardware engineers in the industry
  • Gain exposure across ASIC, FPGA, RTL, networking, and systems engineering
  • Broad technical ownership rather than narrow specialization
  • Relocation support available for candidates moving to Chicago
  • Competitive compensation and long-term career growth opportunities

This role is ideal for engineers who want to work on complex hardware challenges, own meaningful technical decisions, and contribute to systems where performance truly matters.

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